The list file is produced to show the assembly code created for the C source code. Each C source line has the corresponding assembly lines under it to show the compilers work. The following three special cases make the .LST file look strange to the first time viewer. Understanding how the compiler is working in these special cases will make the .LST file appear quite normal and very useful.Some of the code generated by the compiler does not correspond to any particular source line. The compiler will put this code either near the top of the program or sometimes under a #USE that caused subroutines to be generated.
2. The addresses are out of order.
The compiler will create the .LST file in the order of the C source code. The linker has re-arranged the code to properly fit the functions into the best code pages and the best half of a code page. The resulting code is not in source order. Whenever the compiler has a discontinuity in the .LST file, it will put a * line in the file. This is most often seen between functions and in places where INLINE functions are called. In the case of a INLINE function, the addresses will continue in order up where the source for the INLINE function is located.
3. The compiler has gone insane and generated the same instruction over and
over.
Embedded developers have certain needs of their development tools in order to accomplish their jobs. For logic analysis the basic needs are:
1. To access instruction trace information with acceptable impact to the system under development. The developer needs to be able to interrogate and correlate instruction flow to real world interactions.
2. To retrieve information on how data flows through the system with acceptable impact to the system under development, and to understand what system resource(s) are creating and accessing data
3. To assess whether embedded software is meeting the required performance with acceptable impact to the system under development
A switched-mode power supply, switching-mode power supply or SMPS, is an electronic power supply unit (PSU) that incorporates a switching regulator. While a linear regulator maintains the desired output voltage by dissipating excess power in a “pass” power transistor, the SMPS rapidly switches a power transistor between saturation (full on) and cutoff (completely off) with a variable duty cycle whose average is the desired output voltage. The resulting rectangular waveform is low-pass filtered with an inductor and capacitor. The main advantage of this method is greater efficiency because the switching transistor dissipates little power in the saturated state and the off state compared to the semiconducting state (active region). Other advantages include smaller size and lighter weight (from the elimination of low frequency transformers which have a high weight) and lower heat generation from the higher efficiency. Disadvantages include greater complexity, the generation of high amplitude, high frequency energy that the low-pass filter must block to avoid electromagnetic interference (EMI), and a ripple voltage at the switching frequency and the harmonic frequencies thereof.
- The Physical Layer describes the physical properties of the various communications media, as well as the electrical properties and interpretation of the exchanged signals. Ex: this layer defines the size of Ethernet coaxial cable, the type of BNC connector used, and the termination method.
- The Data Link Layer describes the logical organization of data bits transmitted on a particular medium. Ex: this layer defines the framing, addressing and check summing of Ethernet packets.
- The Network Layer describes how a series of exchanges over various data links can deliver data between any two nodes in a network. Ex: this layer defines the addressing and routing structure of the Internet.
- The Transport Layer describes the quality and nature of the data delivery. Ex: this layer defines if and how retransmissions will be used to ensure data delivery.
- The Session Layer describes the organization of data sequences larger than the packets handled by lower layers. Ex: this layer describes how request and reply packets are paired in a remote procedure call.
- The Presentation Layer describes the syntax of data being transferred. Ex: this layer describes how floating point numbers can be exchanged between hosts with different math formats.
The Application Layer describes how real work actually gets done. Ex: this layer would implement file system operations.
Ethernet Controller Features:
• IEEE 802.3 compatible Ethernet controller
• Integrated MAC and 10BASE-T PHY
• Supports one 10BASE-T port with automatic polarity detection and correction
• Supports Full and Half-Duplex modes
• Programmable automatic retransmit on collision
• Programmable padding and CRC generation
• Programmable automatic rejection of erroneous packets
• SPI Interface with clock speeds up to 20 MHz
Buffer:
• 8-Kbyte transmit/receive packet dual port SRAM
• Configurable transmit/receive buffer size
• Hardware-managed circular receive FIFO
• Byte-wide random and sequential access with auto-increment
• Internal DMA for fast data movement
• Hardware assisted checksum calculation for various network protocols
Medium Access Controller (MAC) Features:
• Supports Unicast, Multicast and Broadcast packets
• Programmable receive packet filtering and wake-up host on logical AND or OR of the following:
- Unicast destination address
- Multicast address
- Broadcast address
- Magic Packet™
- Group destination addresses as defined by 64-bit hash table
- Programmable pattern matching of up to 64 bytes at user-defined offset
Physical Layer (PHY) Features:
• Loop back mode
• Two programmable LED outputs for LINK, TX,
RX, collision and full/half-duplex status
Operational:
• Six interrupt sources and one interrupt output pin
• 25 MHz clock input requirement
• Clock out pin with programmable prescaler
• Operating voltage of 3.1V to 3.6V (3.3V typical)
• 5V tolerant inputs
• Temperature range: -40°C to +85°C Industrial, 0°C to +70°C Commercial (SSOP only)
• 28-pin SPDIP, SSOP, SOIC, QFN packages
The HTTP Server included with this application note is implemented as a cooperative task that co-exists with the Microchip TCP/IP Stack and the user’s main application. The Server itself is implemented in the source file “HTTP.c”, with a user application implementing two callback functions. The demo application source file “Websrvr.c” file should be used as a template application to create the necessary interfaces. The HTTP Server provided here does not implement all HTTP functionality; it is a minimal server targeted for embedded system. The user can easily add new functionality as required.
The HTTP Server incorporates these main features:
Supports multiple HTTP connections.
Contains a simple file system (MPFS).
Supports Web pages located in either internal program memory or external serial EEPROM.
Includes a PC-based program to create MPFS images from a given directory.
Supports the HTTP method “GET” (other methods can be easily added).
Supports a modified Common Gateway Interface (CGI) to invoke predefined functions from within the remote browser.
Supports dynamic web page content generation.